Nine common component packaging technologies

Component packaging plays the role of mounting, fixing, sealing, protecting the chip and enhancing the electrothermal performance. At the same time, wires are connected to the pins of the package shell through the contacts on the chip, and these pins are connected to other devices through wires on the printed circuit board, thereby realizing the connection between the internal chip and the external circuit.

Therefore, the chip must be isolated from the outside world to prevent impurities in the air from corroding the chip circuit and causing electrical performance degradation. And the packaged chip is easier to install and transport. Since the quality of the package directly affects the performance of the chip itself and the design and manufacturing of the PCB connected to it, the packaging technology is very important.
An important indicator to measure whether a chip packaging technology is advanced or not is: the ratio of chip area to packaging area, the closer this ratio is to 1, the better.

The main considerations when packaging:

  1. The ratio of chip area to package area is as close as possible to 1:1 in order to improve packaging efficiency.
  2. The pins should be as short as possible to reduce delay, and the distance between the pins should be as far as possible to ensure that they do not interfere with each other and improve performance.
  3. Based on heat dissipation requirements, the thinner the package, the better.

Packaging has roughly gone through the following development process:

  1. Structural aspects.
  2. Material aspects.
    Metal, ceramics→ceramics, plastics→plastics.
  3. Pin shape.
    Long lead straight insertion → short lead or no lead mounting → ball bump.
  4. Assembly method.
    Through hole insertion → surface assembly → direct installation.

The following is an introduction to the specific packaging form:

SOP/SOIC package
SOP is the abbreviation of Small Outline Package, that is, small outline package.

  1. SOP packaging technology was successfully developed by Philips from 1968 to 1969, and then gradually derived:
  2. SOJ, J-pin small outline package
  3. TSOP, thin and small outline package
  4. VSOP, very small outline package
  5. SSOP, reduced SOP
  6. TSSOP, thin and reduced SOP
  7. SOT, small outline transistor
  8. SOIC, small outline integrated circuit

DIP package

DIP is the abbreviation of “Double In-line Package”, that is double in-line package.

One of the plug-in packages, the pins are drawn from both sides of the package, and the package materials are plastic and ceramic. DIP is the most popular plug-in package, and its applications include standard logic ICs, memory LSIs, and microcomputer circuits.

PLCC package

PLCC is the abbreviation of “Plastic Leaded Chip Carrier”, that is, plastic J-lead chip package.

The PLCC package has a square shape and a 32-pin package with pins on all sides. The size is much smaller than that of the DIP package. The PLCC package is suitable for mounting and wiring on the PCB with SMT surface mounting technology, and has the advantages of small size and high reliability.

04TQFP package

TQFP is the abbreviation of “Thin Quad Flat Package” in English, that is, thin plastic package quad flat package. The quad flat package process can effectively use space, thereby reducing the space requirements of the printed circuit board.

TQFP package

Due to the reduced height and volume, this packaging process is very suitable for applications with high space requirements, such as PCMCIA cards and network devices. Almost all ALTERA CPLD/FPGA have TQFP package.

PQFP package

PQFP is the abbreviation of “Plastic Quad Flat Package”, that is plastic package quad flat package.

The distance between the pins of the PQFP package is very small and the pins are very thin. Generally, large-scale or very large-scale integrated circuits use this type of packaging, and the number of pins is generally above 100.

TSOP package

TSOP is the abbreviation of “Thin Small Outline Package”, that is thin small outline package. A typical feature of TSOP memory packaging technology is to make pins around the packaged chip. TSOP is suitable for installing wiring on PCB with SMT (surface mount) technology.

TSOP package shape, parasitic parameters (when the current changes greatly, cause output voltage disturbance) are reduced, suitable for high-frequency applications, operation is more convenient, and reliability is relatively high.

BGA package

BGA is the abbreviation of “Ball Grid Array Package”, that is ball grid array package. In the 1990s, with the advancement of technology, chip integration continued to increase, the number of I/O pins increased sharply, power consumption also increased, and the requirements for integrated circuit packaging became stricter. In order to meet the needs of development, BGA packaging began to be used in production.

The memory packaged with BGA technology can increase the memory capacity by two to three times without changing the volume of the memory. Compared with TSOP, BGA has a smaller volume, better heat dissipation and electrical performance. BGA packaging technology has greatly improved the storage capacity per square inch. Memory products using BGA packaging technology are only one-third the volume of TSOP packaging under the same capacity. In addition, compared with the traditional TSOP package, the BGA package has a faster and more effective way of heat dissipation.

The I/O terminals of the BGA package are distributed under the package in the form of circular or columnar solder joints in an array. The advantage of BGA technology is that although the number of I/O pins has increased, the pin spacing has not decreased but increased. Improve the assembly yield. Although its power consumption increases, the BGA can be soldered with a controlled collapse chip method, which can improve its electric heating performance. The thickness and weight are reduced compared with the previous packaging technology; the parasitic parameters are reduced, the signal transmission delay is small, and the frequency of use is greatly improved; the assembly can be coplanar welding, and the reliability is high.

TinyBGA package

When it comes to BGA packaging, one cannot fail to mention Kingmax’s patented TinyBGA technology. TinyBGA is called “Tiny Ball Grid” in English. It belongs to a branch of BGA packaging technology and was successfully developed by Kingmax in August 1998. The ratio of the chip area to the package area is not less than 1:1.14, which can increase the memory capacity by 2 to 3 times without changing the volume of the memory. Compared with TSOP package products, it has a smaller volume, better heat dissipation performance and electrical performance.

Memory products using TinyBGA packaging technology are only 1/3 of TSOP packaging in the same capacity. The pins of TSOP packaged memory are led out from around the chip, while TinyBGA is led out from the center of the chip. This method effectively shortens the signal transmission distance, and the length of the signal transmission line is only 1/4 of the traditional TSOP technology, so the signal attenuation is also reduced. This not only greatly improves the anti-interference and anti-noise performance of the chip, but also improves the electrical performance. Using TinyBGA package chip can resist FSB up to 300MHz, while adopting traditional TSOP package technology can only resist FSB up to 150MHz.

The thickness of TinyBGA packaged memory is also thinner (package height is less than 0.8mm), and the effective heat dissipation path from the metal substrate to the heat sink is only 0.36mm. Therefore, TinyBGA memory has higher heat transfer efficiency, which is very suitable for long-running systems and has excellent stability.

QFP package

QFP is the abbreviation of “Quad Flat Package”, that is small square flat package. QFP package was used more frequently in early graphics cards, but there are few QFP packaged video memory with a speed of 4ns or more. Because of process and performance issues, it has been gradually replaced by TSOP-II and BGA. The QFP package has pins around the particles, which is quite obvious. Four-side lead flat package. One of the surface mount packages, the pins are led out from the four sides in a seagull wing (L) shape.

There are three kinds of substrates: ceramic, metal and plastic. In terms of quantity, plastic packaging accounts for the vast majority. When the material is not specifically indicated, it is plastic QFP in most cases. Plastic QFP is the most popular multi-pin LSI package. It is used not only for digital logic LSI circuits such as microprocessors and gate displays, but also for analog LSI circuits such as VTR signal processing and audio signal processing.

The pin center distance is 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm and other specifications. The maximum number of pins in the 0.65mm center distance specification is 304.